Referring to FIG. 1, in virtually any configuration of ferroelectric memory cells, the ferroelectric capacitor 100 in a selected memory cell with form a capacitive divider with the capacitance of the bit line that is coupled to that memory cell. In FIG. 1 capacitor CB 102 represents a bit line coupled to a ferroelectric capacitor 100 in a selected memory cell by a word line access control transistor 104. The cell is read by strobing the cell with a read pulse 106.
FIG. 2 shows the hysteresis curve (showing the relationship between polarization and electric field) associated with a typical ferroelectric capacitor. For illustrative purposes we shall define that when the cell is in the "0" state, the polarization state of the ferroelectric capacitor is located at point 140 and when it is in the "1" state its polarization state is located at point 142 in FIG. 2. Thus, when a read pulse is asserted on the cell's drive line, if the cell is in the "1" state, the polarization state of the ferroelectric capacitor will move counterclockwise up the right side of the hysteresis curve to point 144 while the pulse is at its peak, and then when the pulse ends, the polarization state of the ferroelectric capacitor will move to point 140. If the cell is in the "0" state when the read pulse is asserted, the polarization or charge across the ferroelectric capacitor will move back up toward the peak 144 and then back to point 140 after the pulse ends.
Referring again to FIG. 1, the polarization change in the cell, caused by the read pulse 106 generates an electrical charge that is divided across the two capacitors 100 and 102 to produce an output voltage Vout equal to ##EQU1## where K is a conversion constant that converts .DELTA.P into units of electrical charge, CB is the capacitance of the bit line and CF is the capacitance of the ferroelectric capacitor.
Ferroelectric capacitors have a very high dielectric constant. As a result, the bit line capacitance will typically be less than or equal to the capacitance of even a very small ferroelectric capacitor. However, to enable proper switching of the ferroelectric capacitor, the bit line capacitance should be equal to or, better yet, greater than the capacitance of the ferroelectric capacitor in the memory cell.
On the other hand, making the bit line capacitance larger makes the voltage signal on the bit line 212 smaller. For instance, if the full voltage swing of the drive line is one volt and the bit line capacitance is increased to be equal to twice the capacitance of the ferroelectric capacitor, then the voltage signal output by the ferroelectric capacitor on the bit line will be about 330 millivolts. As the ferroelectric capacitor ages, it will generate smaller switching voltages, and the resulting bit line signal may become less than 100 millivolts, which can be difficult to accurately detect with a sense amplifier.